DFT / ATPG Engineer

Senior DFT / ATPG Engineer (Contract)

We're recruiting experienced Design for Test (DFT) engineers for a long-term, on-site programme with a well-known semiconductor client. There are multiple openings, and we're looking to move quickly.

The role

You'll own DFT and ATPG work for complex SoC/ASIC designs, working closely with design, verification and test teams in a fast-paced environment.

• Implement and deliver DFT and ATPG for SoC/ASIC designs
• Generate, analyse and debug ATPG patterns
• Design and implement MBIST architectures, including memory test and diagnostics
• Apply IO test methodologies for interface and pin-level validation
• Work on clock DFT and clock verification
• Collaborate with RTL and digital design teams to resolve testability issues
• Communicate status, risks and findings clearly to stakeholders

What we're looking for

• 5+ years of hands-on DFT and ATPG experience on SoC or ASIC designs
• Strong grasp of DFT fundamentals: controllability, observability and scan-based testing
• Proven expertise in ATPG pattern generation, analysis and debug
• Experience with MBIST, IO test methodologies and clock DFT
• Strong digital design and RTL fundamentals
• Hands-on experience with industry-standard DFT/ATPG EDA tools
• Strong analytical, problem-solving and communication skills

The details

• Long-term contract, 100% on-site
• W2 or C2C
• Competitive hourly rate, depending on experience
• Valid US work authorisation required (OPT cannot be considered)